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EPD TVS Diode Array For ESD and Latch-Up Protection
PROTECTION PRODUCTS Description
The SLV series of transient voltage suppressors are designed to protect low voltage, state-of-the-art CMOS semiconductors from transients caused by electrostatic discharge (ESD), cable discharge events (CDE), lightning and other induced voltage surges. The devices are constructed using Semtechs proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions in leakage currents and capacitance over siliconavalanche diode processes. The SLVU2.8-4 features integrated low capacitance compensation diodes that reduce the maximum capacitance to <8pF per line. This, combined with low leakage current, means signal integrity is preserved in high-speed applications such as 10/100 Ethernet. The SLVU2.8-4 is in an SO-8 package and may be used to protect two high-speed line pairs. The flow-thru design minimizes trace inductance and reduces voltage overshoot associated with ESD events. The low clamping voltage of the SLVU2.8-4 minimizes the stress on the protected IC. The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4.
SLVU2.8-4
PRELIMINARY
Features
u 400 Watts peak pulse power (tp = 8/20s) u Transient protection for high speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (tp = 5/50ns) IEC 61000-4-5 (Lightning) 24A (tp = 8/20s) Protects two line pairs (four lines) Comprehensive pin out for easy board layout Low capacitance Low leakage current Low operating and clamping voltages Solid-state EPD TVS process technology
u u u u u u u u u u u u u u u u u
Mechanical Characteristics
JEDEC SO-8 package Molding compound flammability rating: UL 94V-0 Marking : Part number, date code, logo Packaging : Tape and Reel per EIA 481
Applications
10/100 Ethernet WAN/LAN Equipment Switching Systems Desktops, Servers, & Notebooks Instrumentation Base Stations Analog Inputs
Circuit Diagram
Schematic & PIN Configuration
SO-8 (Top View)
Revision 9/2000 1 www.semtech.com
SLVU2.8-4
PROTECTION PRODUCTS Absolute Maximum Rating
R ating Peak Pulse Pow er (tp = 8/20ms) Peak Pulse Current (tp = 8/20ms) ESD p er IEC 61000-4-2 (Air) ESD p er IEC 61000-4-2 (Contact) Lead Soldering Temp erature Op erating Temp erature Storage Temp erature Symbo l Pp k I PP V ESD TL TJ TSTG Value 400 24 25 15 260 (10 seconds) -55 to +125 -55 to +150 Units Watts A kV
o
C C C
o
o
Electrical Characteristics
SLVU2.8-4 Par ame te r Reverse Stand -Off Voltage Punch -Th rough Voltage Snap -Back Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbo l VRWM V PT VSB IR VC VC VC I PP Cj IPT = 2 A ISB = 50mA V RWM = 2.8V, T=25C (Each Line) IPP = 2A , tp = 8/20 s (Each Line) IPP = 5A , tp = 8/20 s (Each Line) IPP = 24A , tp = 8/20 s (Each Line) tp = 8/20 s V R = 0V, f = 1MHz (Each Line) 5 3.0 2.8 1 5.5 8.5 15 24 8 Co nd itio ns Minimum Typ ical Maximum 2.8 Units V V V A V V V A pF
a 2000 Semtech Corp.
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SLVU2.8-4
PROTECTION PRODUCTS Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10 Peak Pulse Power - PPP (kW)
PRELIMINARY
Power Derating Curve
110 100 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10
1
0.1
0.01 0.1 1 10 Pulse Duration - tp ( s) 100 1000
0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC)
Pulse Waveform
110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 Time (s) 20 25 30
0 14
Clamping Voltage vs. Peak Pulse Current
Waveform Parameters: tr = 8s td = 20s
12 Clamping Voltage - VC (V) 10 8 6 4 2 Waveform Parameters: tr = 8s td = 20s 0 5 10 15 20 25
e
-t
td = IPP/2
Peak Pulse Current - IPP (A)
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SLVU2.8-4
PROTECTION PRODUCTS Applications Information
Device Connection for Protection of Four Data Lines Electronic equipment is susceptible to transient disturbances from a variety of sources including: ESD to an open connector or interface, direct or nearby lightning strikes to cables and wires, and charged cables hot plugged into I/O ports. The SLVU2.8-4 is designed to protect sensitive components from damage and latchup which may result from such transient events. The SLVU2.8-4 can be configured to protect two highspeed line pairs. The device is connected as follows: 1 . Protection of two high-speed line pairs: The SLVU2.8-4 is designed such that the data lines are routed through the device. The first line pair enters at pins 1 and 2 and exit at pins 8 and 7 respectively. The second line pair enters at pins 3 and 4 and exits at pins 6 and 5. The traces must be connected at the bottom of the device as shown. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: l Place the SLVU2.8-4 near the input terminals or connectors to restrict transient coupling. l Minimize the path length between the TVS and the protected line. l Minimize all conductive loops including power and ground loops. l The ESD transient return path to ground should be kept as short as possible. l Never run critical signals near board edges. l Use ground planes whenever possible. SLVU2.8-4 Circuit Diagram
Low Capacitance Protection of Two Differential Line Pairs
Line 1
1 8
Line 1
Line 2 Line 3 Line 4
2
7
Line 2 Line 3 Line 4
3
6
4
5
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SLVU2.8-4
PROTECTION PRODUCTS Typical Applications PRELIMINARY
10/100 Ethernet Protection Circuit
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SLVU2.8-4
PROTECTION PRODUCTS Applications Information (continued)
EPD TVS Characteristics The SLVU2.8-4 is constructed using Semtechs proprietary EPD technology. The structure of the EPD TVS is vastly different from the traditional pn-junction devices. At voltages below 5V, high leakage current and junction capacitance render conventional avalanche technology impractical for most applications. However, by utilizing the EPD technology, the SLVU2.8-4 can effectively operate at 2.8V while maintaining excellent electrical characteristics. The EPD TVS employs a complex nppn structure in contrast to the pn structure normally found in traditional silicon-avalanche TVS diodes. The EPD mechanism is achieved by engineering the center region of the device such that the reverse biased junction does not avalanche, but will punch-through to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while maintaining the capability to absorb high transient currents. The IV characteristic curve of the EPD device is shown in Figure 1. The device represents a high impedance to the circuit up to the working voltage (VRWM). During a transient event, the device will begin to conduct as it is biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a low impedance state, diverting the transient current away from the protected circuit. When the device is conducting current, it will exhibit a slight snap-back or negative resistance characteristic due to its structure. This must be considered when connecting the device to a power supply rail. To return to a non-conducting state, the current through the device must fall below the snap-back current (approximately < 50mA).
,PP
,6%
,37 9%55 ,5 9 5:0 9 9 9& 6% 37
,%55
EPD TVS VI Characteristic Curve
a 2000 Semtech Corp.
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SLVU2.8-4
PROTECTION PRODUCTS Outline Drawing - SO-8 PRELIMINARY
Land Pattern - SO-8
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SLVU2.8-4
PROTECTION PRODUCTS Ordering Information
Par t Numbe r SLVU2.8-4.TB SLVU2.8-4.TE Wo r king Vo ltage 2.8V 2.8V Qty p e r R e e l 500 2,500 R e e l Size 7 Inch 13 Inch
Note: (1) No suffix indicates tube pack.
Contact Information
Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804
a 2000 Semtech Corp. 8 www.semtech.com

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